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YOKOGAWA DLM4038 - Page 328

YOKOGAWA DLM4038
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5-295
IM DLM4038-17EN
Commands
1
2
3
4
5
6
App
Index
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:CLOCk?
Function Queries all clock signal settings for user-defined
bus signal triggering.
Syntax
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:CLOCk?
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:CLOCk:MODE
Function Sets or queries the clock signal enable or disable
status for user-defined bus signal triggering.
Syntax
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:CLOCk:MODE {<Boolean>}
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:CLOCk:MODE?
Example
:TRIGGER:ATRIGGER:SPATTERN:CLOCK:MO
DE ON
:TRIGGER:ATRIGGER:SPATTERN:CLOCK:MO
DE?
-> :TRIGGER:ATRIGGER:SPATTERN:CLOCK:
MODE 1
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:CLOCk:POLarity
Function Sets or queries the clock signal polarity for user-
defined bus signal triggering.
Syntax
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:CLOCk:POLarity {FALL|RISE}
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:CLOCk:POLarity?
Example
:TRIGGER:ATRIGGER:SPATTERN:CLOCK:POL
ARITY FALL
:TRIGGER:ATRIGGER:SPATTERN:CLOCK:POL
ARITY?
-> :TRIGGER:ATRIGGER:SPATTERN:CLOCK:
POLARITY FALL
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:CLOCk:SOURce
Function Sets or queries the clock signal for user-defined
bus signal triggering.
Syntax
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:CLOCk:SOURce {<NRf>}
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:CLOCk:SOURce?
<NRf> = 1 to 8
Example
:TRIGGER:ATRIGGER:SPATTERN:CLOCK:SOU
RCE 1
:TRIGGER:ATRIGGER:SPATTERN:CLOCK:SOU
RCE?
-> :TRIGGER:ATRIGGER:SPATTERN:CLOCK:
SOURCE 1
Description The clock signal that you can specify varies
depending on the
:TRIGger{[:ATRigger]|:B
TRigger}:SPATtern:DATA:SOURce
setting.
For details, see the DLM4000 User’s Manual.
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:CS?
Function Queries all chip select signal settings for user-
defined bus signal triggering.
Syntax
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:CS?
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:CS:ACTive
Function Sets or queries the chip select signal active state
for user-defined bus signal triggering.
Syntax
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:CS:ACTive {HIGH|LOW}
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:CS:ACTive?
Example
:TRIGGER:ATRIGGER:SPATTERN:CS:ACTI
VE HIGH
:TRIGGER:ATRIGGER:SPATTERN:CS:ACTI
VE?
-> :TRIGGER:ATRIGGER:SPATTERN:CS:ACT
IVE HIGH
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:CS:SOURce
Function Sets or queries the chip select signal for user-
defined bus signal triggering.
Syntax
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:CS:SOURce {<NRf>|NONE}
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:CS:SOURce?
<NRf> = 1 to 8
Example
:TRIGGER:ATRIGGER:SPATTERN:CS:SOUR
CE 1
:TRIGGER:ATRIGGER:SPATTERN:CS:SOUR
CE?
-> :TRIGGER:ATRIGGER:SPATTERN:CS:SOU
RCE 1
Description The chip select signal that you can specify varies
depending on the
:TRIGger{[:ATRigger]|:B
TRigger}:SPATtern:DATA:SOURce
setting.
For details, see the DLM4000 User’s Manual.
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:DATA?
Function Queries all data signal settings for user-defined
bus signal triggering.
Syntax
:TRIGger{[:ATRigger]|:BTRigger}:SPAT
tern:DATA?
5.34 TRIGger Group

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