ZiLOG Z8 Technical Manual

I/O Ports
Port 2 can also by configured to provide open-
drain outputs by programming Port 3 Mode register
(P3M) bit 00 to 0 (Figure 9-12).
Regardless of the bit input/output configuration,
Port 2 is always written and read as a byte-wide
port.
R247 P3M
Port 3 Mode Register
(%
F7; Write Only)
L 0 PORT 2 PULL-UPS OPEN DRAIN
1 PORT 2 PULL-UPS ACTIVE
Figure 9-12. Port 2 Open-Drain Outputs
INPUT INPUT
REGISTER
BUFFER
READ
--.
A
PORT
A
K
4
K
4
...
'4
I ~
9.5 PORT 3
Port 3 di ffers structurally from the other three
ports. Port 3 lines are fixed as four input
(P3
0
-P3
3
) and four output (P3
4
-P3
7
) and do not
have an input and output register for each bit.
Instead, all the input lines have one input regis-
ter, and output lines have an output register.
Under software control, the lines can be con-
figured as input or output, special control lines
for handshake, or as I/O lines for the on-board
serial and timer facilities. Figure 9-13 is a
block diagram of Port 3.
9.5.1 Read/Write Operations
Port 3 is accessed as general-purpose register P3
(%03). The port is written by specifying P3 as an
instruction's destination register.
A
~
4
'4
However,
PORT
INPUT
LINES
(
P3
0-P
3
3)
TO INTERRUPT TIMER, HANDSHAKE LOGIC
A
(
...
INTERNAL
BUS
9-6
4
OUTPUT
REGISTER
WRITE
--.
PORT ~
4
)
Y
~I
OR SERIAL I/O
r
READ --.
A
PORT
OUTPUT
~
DATA
RETURN
BUFFER
4
~
Y
FROM TIMER, HANDSHAKE LOGIC
OR SERIAL
1/0
Figure 9-13. Port J Block Diagram
OUTPUT
BUFFER
4
~
r
PORT
OUTPUT
LINES
(
P3
4-P37)
3047-011, 3047-091

ZiLOG Z8 Specifications

General

Brand	ZiLOG
Model	Z8
Category	Desktop
Language	English