ZiLOG Z8 - Page 50

EX8lllple:
Note:
5-16
If addition is performed using the BCD values 15 and 27, the result should be 42.
The sum is incorrect, however, when the binary representations are added in the
destination location using standard binary arithmetic.
0001 0101
+ 0010 0111
0Ul1 T11iU' = % 3 C
The DA statement adjusts this result so that the correct BCD representation is
obtained.
0011 1100
+ 0000 0110
'll'llm" mrro 42
The C, Z, and 5 flags are cleared and V is undefined.
When used to specify a 4-bit working-register address, address modes R or IR use the
format:
E dst