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ZiLOG Z8 - Page 56

ZiLOG Z8
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INC
Increment
INC
dst
Instruction
Format:
ope
Address
Hade
Cycles
(Hex)
dst
dst
OPC
6
rE
r
r=O
to
r
L-
______
O_P_C
______
~I
~I
_______
ds_t
______
~
6
20
R
21
IR
Operation:
Flags:
EXaq>le:
Note:
5-22
dst
<--
dst
+ 1
The
destination
operand's
contents
are
incremented
by
one.
C:
Unaffected
Z:
Set
if
the
result
is
zero;
cleared
otherwise
V:
Set
if
arithmetic
overflow
occurred;
cleared
otherwise
S:
Set
if
the
result
is
negative;
cleared
otherwise
H:
Unaffected
0:
Unaffected
If
working
register
10
contains
%2A,
the
statement
INC
R10
leaves
the
value
%28
in
that
register.
The
Z,
V,
and S
flags
are
cleared.
When
used
to
specify
a
4-bit
working-register
address,
address
modes
R
or
IR
use
the
format:
E
dst

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