ZiLOG Z8 Technical Manual

'---
ltll'
dst
Instruction format:
OPC
Operation:
flags:
Example:
Note:
INCW
Increment Word
OPC
Address Hade
Cycles
(Hex)
dst
I
I
dst
10
AD
RR
A1 IR
dst <-- dst +
The contents of the destination (which must be an even address) and the byte
following that location are treated as a single 16-bit value which is incremented by
one.
C: Unaffected
Z: Set if the result is zero; cleared otherwise
V: Set if arithmetic overflow occurred; cleared otherwise
S: Set if the result is negative; cleared otherwise
H: Unaffected
0: Unaffected
If working-register pair 0-1 contains the value %FAF3, the statement
INCW RRO
leaves the value %FAF4 in working-register pair 0-1. The Z and V flags are cleared
and S is set.
When used to specify a 4-bit working-register pair address, address modes RR or IR
use the format:
E
dst
5-23

ZiLOG Z8 Specifications

General

Brand	ZiLOG
Model	Z8
Category	Desktop
Language	English