Host Interface 18 (114)
3.2.7 RESET (Reset Input)
Signal Name Pin Type Pin Description
Reset I 8 Reset
Used to reset the module.
The reset input is active low. It must be connected to a host application controllable output pin
in order to handle the power up sequence, voltage deviations and to be able to support network
reset requests.
The module does not feature any internal reset regulation. To establish a reliable interface, the
host application is solely responsible for resetting the module when the supply voltage is
outside the specified range.
There is no Schmitt trigger circuitry on this input, which means that the module requires a fast
rise time of the reset signal, preferably equal to the slew rate of typical logical circuits. A simple
RC circuit is for example not sufficient to guarantee stable operation, as the slew rate from logic
0 to logic 1 is too slow.
The rise time of the reset signal should be as fast as possible, and must not exceed
30 ns. The signal is not under any circumstances allowed to be left floating. Use a
pull-down to prevent this.
The following requirements must be met by the reset regulator connected to the reset input
signal.
Power Up
Power
RESET
0V
3.3V
Power
On
Power
Stable
t
B
t
A
V
IL
V
IH
t
t
Fig. 5
Power up time limits are given in the table below:
Symbol Min. Max. Definition
t
A
- -
Time until the power supply is stable after power-on; the duration depends
on the power supply design of the host application and is thus beyond the
scope of this document.
t
B
1ms
-
Safety margin.
Anybus
®
CompactCom
™
M40 Hardware Design Guide HMSI-216-126 EN 2.6
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