ASIX AX99100 - Page 50

50
AX99100
PCIe to Multi I/O Controller
Copyright © 2016 ASIX Electronics Corporation. All rights reserved.
PCI Configuration Space Map for SPI (Function 3)
Offset
Register Name
31 24
23 16
15 8
7 0
0x00
Device ID
Vendor ID
0x04
Status
Command
0x08
Class Code
Revision ID
0x0C
0x10
Base Address Registers 0
0x14
Base Address Registers 1
0x18
0x1C
0x20
0x24
Base Address Registers 5
0x28
0x2C
Subsystem ID
Subsystem Vendor ID
0x30
0x34
0x38
0x3C
Interrupt Pin (0x04)
Interrupt Line
PCI Configuration Space Map for LB (Function 0)
Offset
Register Name
31 24
23 16
15 8
7 0
0x00
Device ID
Vendor ID
0x04
Status
Command
0x08
Class Code
Revision ID
0x0C
0x10
Base Address Registers 0
0x14
Base Address Registers 1
0x18
0x1C
0x20
Base Address Registers 4
0x24
Base Address Registers 5
0x28
0x2C
Subsystem ID
Subsystem Vendor ID
0x30
0x34
0x38
0x3C
Interrupt Pin (0x01)
Interrupt Line
(0x00)