AX99100
PCIe to Multi I/O Controller
Copyright © 2016 ASIX Electronics Corporation. All rights reserved.
Power–up/down and Power Management Sequence 4.4
The AX99100 related power up/down and power management sequences are designed to meet the PCI Express
Card Electromechanical Specification Revision 2.0. Please reference the section 2.2.1 for power up sequence,
section 2.2.2 for power management sequence and section 2.2.3 for power down sequence for the detail in this
standard.
Note: There is NO power plane separation between 3.3V AUX and VCCIO in AX99100. In D3 Cold, the chip
VCCIO and VCC33A_REG should be powered from 3.3V AUX to support remote wake up.
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