ASIX AX99100 - AX99100 Block Diagram

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Copyright © 2016 ASIX Electronics Corporation. All rights reserved.
AX99100
PCIe to Multi I/O Controller
AX99100 Block Diagram 1.2
Figure 1-1: AX99100 Block Diagram
RXD[4:1],
TXD[4:1],
CTS[4:1],
DSR[4:1]
RI[4:1],
DCD[4:1],
RTS[4:1]
DTR[4:1]
STROBEn,
AUTOLFn
INITn,
SELECTINn,
ACKn,
BUSY,
PAPEREND,
SELECT,
PP_DIR
DATA[7:0]
PCIe PHY
&
Controller
SPI
Local Bus
LDO
Serial Port x 4
24 GPIO
POR &
Reset Gen.
I2C
CLKN, CLKP,
REXT,
DIN,DIP,
DON, DOP,
WAKEn
CLKREQn,
RSTn
SS[2:0],
SCLK,
MOSI,
MISO,
SWAKEn
VCC33A_REG,
VO12
SCL, SDA
RSTn
GPIO[23:0]
Parallel Port
PCIe
Arbiter
OSC &
Clock Gen.
EXT_CLK,
EXT_CLK_PDn
CLKO,
RSTO,
CS0n,
CS1n,
ALE,
A[9:0],
AD[15:0],
RDn,
WRn,
RDY,
INT[1:0],
DREQ[1:0],
DACK[1:0]