ASIX AX99100 User Manual

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Copyright © 2016 ASIX Electronics Corporation. All rights reserved.
AX99100
PCIe to Multi I/O Controller
3.3.2 Configuration EEPROM Memory Map for Local Bus Interface
Table 3-5: Configuration EEPROM Memory Map for Local Bus
EEPROM Offset
Parameter
0x00
Divide Clock Selection
0x01
Clock Divider
0x03~0x02
Vendor ID_F0
0x05~0x04
Device ID_F0
0x06
Revision ID
0x07
Programming IF_F0
0x08
Sub-Class Code_F0
0x09
Base Class Code_F0
0x0B~0x0A
Subsystem Vendor ID_F0
0x0D~0x0C
Subsystem Device ID_F0
0x0F~0x0E
Power Management Capabilities_F0
0x17~0x10
Reserved
0x19~0x18
Local Bus Interrupt Enable/Miscellaneous Setting
0x1B~0x1A
PCIe BAR0 Range
0x1D~0x1C
PCIe BAR1 Range
0x1F~0x1E
Reserved
0x21~0x20
Local Address Space 0 Setting
0x25~0x22
Local Address Space 0 Timing Setting
0x29~0x26
Local Address Space 0 Address Setting
0x2B~0x2A
Local Address Space 1 Setting
0x2F~0x2C
Local Address Space 1 Timing Setting
0x33~0x30
Local Address Space 1 Address Setting
0x54~0x34
INT Mask
0x55
Port Disable Register
0x56
Global Setting
0x5A~0x57
Reserved
0x5B
Check-Sum
0x7F ~ 0x5C
Reserved

ASIX AX99100 Specifications

General

Brand	ASIX
Model	AX99100
Category	Controller
Language	English