ASIX AX99100 User Manual

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Copyright © 2016 ASIX Electronics Corporation. All rights reserved.
AX99100
PCIe to Multi I/O Controller
3.3.1 Configuration EEPROM Memory Map for None Local Bus Interface
Table 3-4: Configuration EEPROM Memory Map for none Local Bus mode
EEPROM
Offset
Parameter
Note
0x00
Divide Clock Selection
SPI interface
used
0x01
Clock Divider
0x03~0x02
Vendor ID_F0
Function0
0x05~0x04
Device ID_F0
0x06
Revision ID
0x07
Programming IF_F0
0x08
Sub-Class Code_F0
0x09
Base Class Code_F0
0x0B~0x0A
Subsystem Vendor ID_F0
0x0D~0x0C
Subsystem Device ID_F0
0x0F~0x0E
Power Management Capabilities_F0
0x16~0x10
Reserved
0x18~0x17
Vendor ID_F1
Function1
0x1A~0x19
Device ID_F1
0x1B
Programming IF_F1
0x1C
Sub-Class Code_F1
0x1D
Base Class Code_F1
0x1F~0x1E
Subsystem Vendor ID_F1
0x21~0x20
Subsystem Device ID_F1
0x23~0x22
Power Management Capabilities _F1
0x2A~0x24
Reserved
0x2C~0x2B
Vendor ID_F2
Function2
0x2E~0x2D
Device ID_F2
0x2F
Programming IF_F2
0x30
Sub-Class Code_F2
0x31
Base Class Code_F2
0x33~0x32
Subsystem Vendor ID_F2
0x35~0x34
Subsystem Device ID_F2
0x37~0x36
Power Management Capabilities_F2
0x3E~0x38
Reserved
0x40~0x3F
Vendor ID_F3
Function3
0x42~0x41
Device ID_F3
0x43
Programmable IF_F3
0x44
Sub-Class Code_F3
0x45
Base Class Code_F3
0x47~0x46
Subsystem Vendor ID_F3
0x49~0x48
Subsystem Device ID_F3
0x4B~0x4A
Power Management Capabilities_F3
0x52~0x4C
Reserved
0x54~0x53
INT Mask
For each function
0x55
Port Disable Register
0x56
Global Setting
0x5A~0x57
Reserved
0x5B
Check-Sum
0x7F ~ 0x5C
Reserved
Note: Function 2 should be disabled in SPI mode and Function 3 should be disabled in PP mode.

ASIX AX99100 Specifications

General

Brand	ASIX
Model	AX99100
Category	Controller
Language	English