Accessing 16-bit registers
The Atmel AVR peripherals typically contain several 16-bit registers that can be accessed via the 8-bit
data bus (e.g.: TCNTn of a 16-bit timer). The 16-bit register must be byte accessed using two read or
write operations. Breaking in the middle of a 16-bit access or single stepping through this situation may
result in erroneous values.
Restricted I/O register access
Certain registers cannot be read without affecting their contents. Such registers include those which
contain flags which are cleared by reading, or buffered data registers (e.g.: UDR). The software front-end
will prevent reading these registers when in stopped mode to preserve the intended non-intrusive nature
of OCD debugging. In addition, some registers cannot safely be written without side-effects occurring -
these registers are read-only. For example:
• Flag registers, where a flag is cleared by writing '1' to any bit. These registers are read-only.
• UDR and SPDR registers cannot be read without affecting the state of the module. These registers
are not accessible.
4.4.12. megaAVR Special Considerations
Software breakpoints
Since it contains an early version of the OCD module, ATmega128[A] does not support the use of the
BREAK instruction for software breakpoints.
JTAG clock
The target clock frequency must be accurately specified in the software front-end before starting a debug
session. For synchronization reasons, the JTAG TCK signal must be less than one fourth of the target
clock frequency for reliable debugging. When programming via the JTAG interface, the TCK frequency is
limited by the maximum frequency rating of the target device, and not the actual clock frequency being
used.
When using the internal RC oscillator, be aware that the frequency may vary from device to device and is
affected by temperature and V
CC
changes. Be conservative when specifying the target clock frequency.
JTAGEN and OCDEN fuses
The JTAG interface is enabled using the JTAGEN fuse, which is programmed by default. This allows
access to the JTAG programming interface. Through this mechanism, the OCDEN fuse can be
programmed (by default OCDEN is un-programmed). This allows access to the OCD in order to facilitate
debugging the device. The software front-end will always ensure that the OCDEN fuse is left un-
programmed when terminating a session, thereby restricting unnecessary power consumption by the
OCD module. If the JTAGEN fuse is unintentionally disabled, it can only be re-enabled using SPI or High
Voltage programming methods.
If the JTAGEN fuse is programmed, the JTAG interface can still be disabled in firmware by setting the
JTD bit. This will render code un-debuggable, and should not be done when attempting a debug session.
If such code is already executing on the Atmel AVR device when starting a debug session, the Atmel-ICE
will assert the RESET line while connecting. If this line is wired correctly, it will force the target AVR device
into reset, thereby allowing a JTAG connection.
If the JTAG interface is enabled, the JTAG pins cannot be used for alternative pin functions. They will
remain dedicated JTAG pins until either the JTAG interface is disabled by setting the JTD bit from the
program code, or by clearing the JTAGEN fuse through a programming interface.
Atmel Atmel-ICE [USER GUIDE]
Atmel-42330C-Atmel-ICE_User Guide-10/2016
44
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