Atmel ATtiny26 - Data Indirect with Post-increment

13
ATtiny26(L)
1477G–AVR–03/05
The X-, Y-, or Z-register is decremented before the operation. Operand address is the
decremented contents of the X-, Y-, or Z-register.
Data Indirect with Post-
increment
Figure 12. Data Indirect Addressing with Post-increment
The X-, Y-, or Z-register is incremented after the operation. Operand address is the con-
tent of the X-, Y-, or Z-register prior to incrementing.
Constant Addressing Using
the LPM Instruction
Figure 13. Code Memory Constant Addressing
Constant byte address is specified by the Z-register contents. The 15 MSBs select word
address (0 - 1K), the LSB selects low byte if cleared (LSB = 0) or high byte if set
(LSB = 1).
Data Space
$0000
$00D
F
X-, Y-, OR Z-REGISTER
015
1
$3F
F
$00
0
PROGRAM MEMORY