Advanced DVB-S2 Receiver Operational Manual
SR1 Specifications
11
Management CPU: The management CPU implements the control of the board and the user
interface.
Application CPU: The application CPU is an optional CPU (added ad daughter board) that has
a GigE connection to the switch.
GigE Switch: The backbone of the SR1 is an internal managed GigE switch. The Internal
switch is managed (QoS, VLAN etc).
4.3
SR1 Receivers Management
The SR1 receiver consists of three components. The RF inputs, the Demodulator and the De-
capsulation filters.
The SR1 supports two modes for operating the receivers ( RX channels):
Single Demodulator: The two RF inputs are connected to a single demodulator. All the eight
De-Capsulation filters are connected to the single demodulator
Dual Demodulator: Each RF is in use by one of the demodulators. 4 de capsulation filters are
connected to the first demodulator and 4 to the second
For each receiver, the SR1 supports two configuration profiles. The configuration profile
includes the RF parameters (L-Band frequency and LNB control), the demodulator
parameters and the de-capsulation filters configuration.
The operator uses the SR1 in the following modes:
Single Demodulator with a Round Robin rotation between the Two RF Inputs and between the
Two Configuration Profiles of each. RF1 (Profile1) -> RF1 (Profile2) -> RF2 (Profile1) -> RF2
(Profile2) -> RF1 (Profile1):
The SR1 rotates between the states until it locks on a valid signal.
The time out for each state is configurable.
The two RF inputs can be connected to two different LNBs on to different antennas.
The lock criteria is RF lock and does not validate the data.
Single Demodulator with One RF Input and Two Profiles. The SR1 will switch to the second
profile the moment it loses the lock on the first one
Dual Demodulator, each with a Single RF with two profiles.
Single RF input with single profile and single demodulator
4.4
SR1 Packets forwarding
The SR1 forwards IP packets received from the satellite link, into the local LAN over the Traffic
interface.
When a destination MAC address of an MPE section matches the MAC address in one of the
SR1 Filters (after passing the PID stage) the IP part is encapsulated into a Ethernet packet
and sent to the internal switch