98 D50 PLC User's Manual
Instruction
Mnemonic Shift to Right Range
Bit
■ Byte
SHR
DSHR
Shift to right (low-order bit) by N
bits
The highest bit becomes 0
■ Word
Ladder
D = Register address
N = Number of bits to rotate
Description
1. Order:
Shift N bits to the right (from high-order bit to low-order bit).
MSB (most significant bit) becomes 0.
Fill the carry bit (F1.8) with the LSB (least significant bit).
2. Shift the register specified as D to the right by N bits. Each bit will move one bit position
lower in the register.
3. The D register is either a byte or a word. For SHR (byte), N = 0 to 7. For DSHR (word), N =
0 to 15.
4. This operation will occur on every scan for which the input condition is true (On). To perform
the operation only on a change of input condition, use the rising/falling edge contact.
Example
Program Expression Time Chart
Regardless of N, the MSB moves to the carry (F1.8)
and the LSB always becomes 0.
The R0.0 input is the initial condition, used to set the
initial value of M0 to $FFFF.
SHR
D =
N =
R
MSB LSB
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 C carry
(F1.8)
p o n m l k j i h g f e d c b a
R0.0
R
DLET
D = M0
S = $FFFF
DSHR
D = M0
N = 1
R0.1
R
0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1
0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
R0.0
R0.1
$FFFF $7FFF $3FFF
M0
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