Table 48. Processor Settings details (continued)
Option Description
IOMMU Support Enable or Disable IOMMU support. It is required to create
IVRS ACPI table. This option is set to Enabled by default.
Kernel DMA Protection When this option is set to Enabled, using IOMMU, BIOS,
and the Operating System will enable direct memory access
protection for DMA capable peripheral devices. Enable
IOMMU Support to use this option. This option is set
to Disabled by default. When set to Enabled by using
Virtualization Technology, BIOS and Operating System will
enable direct memory access protection for DMA capable
peripheral devices. Enable Virtualization Technology to use
this option.
L1 Stream HW Prefetcher Enables or disables the L1 stream hardware prefetcher. This
option is set to Enabled by default.
L2 Stream HW Prefetcher Enables or disables the L2 stream hardware prefetcher. This
option is set to Enabled by default.
L1 Stride Prefetcher Enables or disables the L1 stride prefetcher. This option is set
to Enabled by default, as it optimizes overall workload.
NOTE: This option is only available for 3rd Generation
AMD EPYC processors.
L1 Region Prefetcher Enables or disables the L1 region prefetcher. This option is set
to Enabled by default, as it optimizes overall workload.
NOTE: This option is only available for 3rd Generation
AMD EPYC processors.
L2 Up Down Prefetcher Enables or disables the L2 up down prefetcher. This option is
set to Enabled by default, as it optimizes overall workload.
NOTE: This option is only available for 3rd Generation
AMD EPYC processors.
MADT Core Enumeration Specifies the MADT Core Enumeration. This option is set to
Linear by default.
NUMA Nodes Per Socket Specifies the number of NUMA nodes per socket. This option
is set to 1 by default.
L3 cache as NUMA Domain Enables or disables the L3 cache as NUMA Domain. This
option is set to Disabled by default.
Secure Memory Encryption Enables or disables the AMD secure encryption features such
as SME and Secure Encrypted Virtualization (SEV). It also
determines if other secure encryption features such as TSME
and SEV-SNP can be enabled. This option is set to Disabled
by default.
NOTE: This option is only available for 3rd Generation
AMD EPYC processors.
Minimum SEV non-ES ASID Determines the number of Secure Encrypted Virtualization ES
and non-ES available Address Space IDs. This option is set to
1 by default.
Transparent Secure Memory Encryption Enables or disables the TSME. TSME is always-on memory
encryption that does not require OS or hypervisor support.
This option is set to Disabled by default.
● If the OS supports SME, do not enable this field.
● If the hypervisor supports SEV, do not enable this field.
Enabling
TSME affects the system memory performance.
Pre-operating system management applications 47
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