control signal for the power converter synchronization.
Signal MPSoC Pin Description
PWR_SYNC Package pin W9 Clock signal used for DC/DC converters synchronization
• Floating/Driven high: Default switching frequency (as specified in
the schematics) is used.
• Driven low: Invalid, may cause instability of all DC/DC converters
on board.
• Clock signal: The DC/DC converters are synchronized with this
external clock signal.
Table 14: Power Converter Synchronization
The synchronization frequency valid for all switching DC/DC converters on-board and compensation net-
works must lie in the range 860..1000 kHz.
Depending on the selected frequency, it is recommended to adjust the duty cycle of the synchronization
clock accordingly, in order to ensure a minimum time of 600 ns for the high level of the clock signal. This
implies that for higher clock frequencies the duty cycle must be increased to 65-75%.
When VCC_IO_B66 is 1.0 V, the synchronization of the DC/DC converters to a user frequency is not supported,
as there is no 1.0 V output standard available in HP banks. For details on I/O standards, refer to the Zynq
UltraScale+ MPSoC, DC and AC Switching Characteristics [20].
2.11.2 Power Enable/Power Good
The Mercury+ XU8 SoC module provides a power enable input on the module connector. This input may
be used to shut down the DC/DC converters and LDOs for 0.72/0.85/0.9 V, 0.85/0.9 V, 0.9 V, 1.2 V, 1.8 V and
2.5 V. The list of regulators that can be disabled via PWR_EN signal is provided in Section 2.11.1.
The PWR_EN input is pulled to VCC_3V3 on the Mercury+ XU8 SoC module with a 10 kΩ resistor. The
PWR_GOOD signal is pulled to VCC_3V3 on the Mercury+ XU8 SoC module with a 10 kΩ resistor.
PWR_GOOD is an open collector signal and must not be used to drive a load directly. This signal is pulled
to GND if the on-board regulators fail or if the module is disabled via PWR_EN. The list of regulators that
influence the state of PWR_GOOD signal is provided in Section 2.11.1.
Pin Name Module Connector Pin Remarks
PWR_EN A-10
Floating/3.3 V: Module power enabled
Driven low: Module power disabled
PWR_GOOD A-12
0 V: Module supply not ok
3.3 V: Module supply ok
Table 15: Module Power Status and Control Pins
D-0000-454-001 28 / 60 Version 06, 18.11.2019
To Next Page
Loading...
Need help?
General
