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General| Brand | Enclustra |
|---|---|
| Model | Mercury XU5 |
| Category | Control Unit |
| Language | English |
Covers general module information, safety precautions, warranty, RoHS compliance, and disposal guidelines.
Detailed list of the Mercury XU5 SoC module's key hardware and software capabilities.
Lists provided documentation, resources, reference designs, and related accessories for the module.
Information regarding the Xilinx development tools supported for the module.
Hardware block diagram illustrating the Mercury XU5 SoC module architecture.
Details on standard module configurations and their corresponding product codes.
Explanation of module article numbers, serial number identification, and revision codes.
Visual representations and assembly drawings of the module's top and bottom sides.
Module footprint dimensions for base board mounting and mechanical specifications.
Details on the Hirose FX10 module connectors, pin numbering, and types.
Comprehensive information on user-accessible input/output pins and their conventions.
Overview of GTH and GTR transceivers, including their specifications and connectivity.
Details on the module's power supply generation, inputs, outputs, and monitoring.
Information on the module's clock sources, frequencies, and connections.
Details on the power-on reset (POR) and system reset (SRST) signals.
Description of the user and status LEDs available on the module.
Details on the DDR4 SDRAM connected to the Processing System (PS).
Details on the DDR4 SDRAM connected to the Programmable Logic (PL).
Information on the Quad SPI flash memory for booting and data storage.
Details on the eMMC flash memory for booting and data storage.
Interface details for connecting and operating an SD card.
Details on the Gigabit Ethernet interface connected to the Processing System (PS).
Details on the Gigabit Ethernet interface connected to the Programmable Logic (PL).
Information on the USB 2.0 interfaces and their PHY types.
Details on the built-in USB 3.0 controllers and their PHY interface.
Information on the built-in DisplayPort controllers and their PHYs.
Functionality and access to the internal real-time clock (RTC).
Details on the secure EEPROM for storing module configuration and data.
Key configuration pins for MPSoC boot modes and FPGA configuration.
Configuration of pull-up resistors for FPGA I/Os during device configuration.
Mechanism to override the PL power-on delay time to a default standard time.
Selection of module boot modes using specific signals on the connector.
Details on the JTAG interface for debugging, programming, and system testing.
Operation of the module when booting from the on-board eMMC flash.
Operation of the module when booting from the on-board QSPI flash.
Operation of the module when booting from an SD card.
Procedure for formatting and programming the eMMC flash memory.
Using JTAG for QSPI flash programming with Xilinx Vivado and SDK tools.
Method for programming QSPI flash directly from an external SPI master.
Using the Enclustra Module Configuration Tool (MCT) for QSPI flash programming.
Overview of the I2C bus and its connections to MPSoC, EEPROM, and external devices.
Description of the I2C interface signals (SDA, SCL, INT#) and their connections.
Address map for various devices connected on the I2C bus.
Details on the secure EEPROM for storing module configuration and data.
Absolute maximum ratings for the Mercury XU5 SoC module components.
Recommended operating conditions for the module, including voltage and temperature ranges.
Information and instructions for ordering the Mercury XU5 SoC module.
Information on how to access technical support resources and documentation.
