Epson RX4111CE - Page 55

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14. How to use

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ETM62E-02 Seiko Epson Corporation 54

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Next process

 Select and set /INT output in AIE bit.

Bank1 - Dh

 Select week or day in WADA bit.

 Clear AF bit

Alarm setting

Set AIE bit to 0 to stop Alarm-interrupt function.

 Set alarm data.

Bank1 - Fh

Bank1 - 7h 9h

Bank2 - Ch

Figure 45 Flow7

Main Page

ETM62E Revision History3
Table of Contents4
Index4
Overview6
Block Diagram6
Terminal Description7
Terminal Connections7
Pin Functions7
Table 1 Pin Description7
Connection Example8
Battery Switchover Connection Examples8
External Dimensions / Marking Layout9
External Dimensions9
Marking Layout9
Absolute Maximum Ratings10
Recommended Operating Conditions10
Frequency Characteristics10
Table 2 Absolute Maximum Ratings10
Table 3 Recommended Operating Conditions10
Table 4 Frequency Characteristics10
Electrical Characteristics11
DC Characteristics11
Table 5 DC Characteristics11
Chargeable Current Characteristics12
Reference Value of Switching Element12
Table 6 Reference Value of Switching Element12
AC Characteristics13
AC Characteristics (1)13
Table 7 AC Characteristics13
AC Characteristics (2)14
Interface Timing When Power on / off14
Restrictions of SPI-Bus Interface in the Power on / off14
Table 8 FOUT Symmetry14
Table 9 Power up down Characteristics14
VDD and CE Timing at Power on15
Table 10 CE Timing15
Reset by Software16
Reference Information17
Reference Data17
Application Notes18
Overview of Functions and Registers19
Overview of Functions19
Register Table20
Table 11 SPI-Bus 4Bits Registers20
Table 12 Register Table 120
Table 13 Register Table 221
Register Initial Value, and Read/Write Operation Table22
Table 14 Register Initial Value 122
Table 15 Register Initial Value 223
Description of Registers24
Clock and Calendar Counter (Bank1 - 1H ~ 6H)24
Timer Setting and Timer Counter Register (Bank1 - Ah ~ Ch)24
Alarm Registers (Bank1 - 7H ~ 9H, Bank2 - Ch)24
Function-Related Register (Bank1 - 1Dh ~ 1Fh)24
Power Switching Circuit-Related Register Bank3 02H25
Time Stamp-Related Register25
RAM Registers (Bank4, 5, 6, 7)25
How to Use26
Clock Calendar Explanation26
Clock Counter26
Table 16 Time Calendar Setting Ex26
Week Counter27
Calendar Counter27
Table 17 Week Register27
Table 18 DAY, MONTH Register27
Wake-Up Timer Interrupt Function28
Related Registers for Function of Wake-Up Timer Interrupt Function28
Table 19 Wake-Up Timer Interrupt Register28
Table 20 TSEL Bit Source Clock Select28
Table 21 te Bit (Timer Enable)29
Table 22 TF Bit (Timer Flag)29
Table 23 TIE Bit (Timer Interrupt Enable)29
Table 24 TBKON, TBKE (Timer Backup ON, Timer Backup/Normal Enable)30
Table 25 TMPIN Bit (Timer PIN)30
Table 26 TSTP Bit (Timer STOP)30
Wake-Up Timer Start Timing31
Interruption Period of Wake-Up Timer31
Table 27 Wake-Up Timer Interrupt Cycles31
Diagram of Wake-Up Timer Interrupt Function32
Alarm Interrupt Function33
Related Registers for Alarm Interrupt Functions33
Table 28 Alarm Interrupt Registers33
Table 29 WADA Bit (Week Alarm / Day Alarm Select)33
Examples of Alarm Settings34
Table 30 AF Bit (Alarm Flag)34
Table 31 AIE Bit (Alarm Interrupt Enable)34
Table 32 Alarm Setting Ex134
Table 33 Alarm Setting Ex234
Time Update Interrupt Function36
Related Registers for Time Update Interrupt Functions36
Table 34 Time Update Interrupt Registers36
Table 35 USEL Bit (Update Interrupt Select)36
Table 36 UF Bit (Update Flag)36
Table 37 UIE Bit (Update Interrupt Enable)36
Time Update Interrupt Function Diagram37
Status Monitoring Function38
Related Registers for Status Monitoring38
Table 38 RTC Status Monitor Register38
Table 39 por Bit (Power on Reset)38
Table 40 VLF Bit (Voltage Low Flag)38
Table 41 XST Bit (Crystal Oscillation Stop)38
FOUT Function [Clock Output Function]39
FOUT Control Register39
FOUT Function Table39
Table 42 FOUT Register (Frequency OUT)39
Table 43 FSEL Register (Frequency Select)39
Battery Backup Switchover Function40
Description of Battery Backup Switchover Function40
Table 44 Battery Backup Switchover Function Related Register40
Table 45 INIEN Bit (Initial Enable)40
Table 46 SW Status40
Table 47 INIEN, SWSEL Combination41
Table 48 the Timing of VDET141
Table 49 SMPT Bit (Sample Time)42
Time Stamp Function44
Description of Time Stamp Function44
Related Registers for Time Stamp Functions44
Table 50 Time Stamp Function Registers44
Table 51 EVF Bit (Event Flag)45
Table 52 EIE Bit (Event Interrupt Enable)45
Table 53 OVW Bit (over Write)45
Time Stamp Function Triggered by SPI Access46
Table 54 COMTG Bit (Command Trigger)46
Time Stamp Record Register47
Table 55 Time Stamp Record Register47
Table 56 Status Stamp47
RTC Self Monitoring Time Stamp Function48
Time Stamp Record Register48
Table 57 Time Stamp RAM Control Registers48
Table 58 VDET Bit (VDET)48
Table 59 XST Bit (Crystal Oscillation Stop)48
Multiple Time Stamp49
Flow Chart51
Reading/Writing Data Via the SPI-Bus Interface57
Write / Read and Bank Select57
Write of Data57
Read of Data57
Connection Example58
Tables59
Figures60
Contacts61

Epson RX4111CE - Page 55

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