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Service Manual
8-4
8-7. Isolation Circuits
The Isolation Circuits allow the Microprocessor to turn off power to the A5U6, A5U7,
and A5U8 components. These three components consume the majority of the power on
the IEEE-488 Assembly; normal meter operation on batteries is extended by
approximately 100% with this power isolation scheme.
The Microprocessor determines that the IEEE-488 Assembly is installed in the meter by
checking the state of the OPS signal (A5J2-18). This signal is pulled up to VCC by
resistor A1R39 and is shorted to logic ground on the IEEE-488 Assembly. If A1U6-29 is
low, the Microprocessor assumes that the IEEE-488 Assembly is installed. If the
ACON* signal (A1U6-33) is low (indicating operation on ac power), the Microprocessor
drives A1U6-28 high. As a result, the OPTSW* signal (A1U7-3) is driven to VEE, and
transistor A5Q1 turns on. This transistor passes current from the VCC power supply to
the VCC2 power supply to bias A5U6, A5U7, and A5U8. Normally VCC2 is
approximately 0.1V less than VCC.
When OPTSW* (A5J3-12) is near VCC (battery operation), diode A5CR1 and pulldown
resistor A5R1 cause the non-inverting octal tri-state buffer (A5U4) to be tri-stated off by
holding inputs A5U4-1 and A5U4-19 near VCC. This octal buffer isolates six
Microprocessor outputs (ADD(2), ADD(1), ADD(0), WR*, RD, and E clock) from the
IEEE-488 Controller (A5U6) when the meter is operating on batteries. A5U4 also
buffers the chip-select signal (A5U5-8) that goes to A5U6 and the interrupt output signal
from A5U6-10.
The eight bit data bus from the Microprocessor is isolated from A5U6 by an octal bus
transceiver with tri-state outputs (A5U3). This transceiver is enabled only when the
Address Decoding Circuit detects that a memory cycle for the IEEE-488 Assembly is in
progress and A5U3-19 is driven low. If the memory cycle is a read cycle, the R/W*
signal (A5U3-1) is high and the transceiver buffers the eight bit data from A5U6 to
A1U6. If the memory cycle is a write cycle, the R/W* signal (A5U3-1) is low and the
transceiver buffers the eight-bit data from A1U6 to A5U6.
8-8. IEEE-488 Controller
The IEEE-488 Controller (A5U6) is an integrated circuit that performs the transfer of
information between the IEEE-488 standard bus and the Microprocessor. Once it has
been programmed by the Microprocessor via the eight register microprocessor interface,
A5U6 performs IEEE-488 bus transactions independently until it must interrupt the
Microprocessor for additional information or data.
The IEEE-488 Controller is clocked by a 921.6-kHz square-wave clock. This clock
(A5U4-5) is generated by buffering the E clock (A5U4-15) from the Microprocessor.
The IEEE-488 Controller uses this clock to run the internal state machines that handle
IEEE-488 bus transactions.
The IEEE-488 Controller can be given a hardware reset with either of the following two
methods:
• If the system reset signal RESET (A5J3-14) goes high or if OPTSW* (A5J3-12)
goes high, then NOR gate output A5U2-10 goes low, and the D flip-flop Q output
A5U9-9 goes low. This flip-flop output drives the reset input (A5U6-22), forcing the
IEEE-488 Controller into its reset state.
• When the meter is initially powered up, both RESET and OPTSW* are high, forcing
the IEEE-488 Controller reset input (A5U6-22) to be low. As long as OPTSW* is
high, VCC2 is near ground and A5U6 is not biased, so A5U6-22 is held low to avoid
sourcing current into A5U6-22 while A5U6 is unbiased.
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