Theory of Operation
Detailed Circuit Description
2
2-21
from the power supply). These six signals (SWR1 through SWR6) are connected to a bi-
directional I/O port on the microprocessor. Each successive column has one less switch.
This arrangement allows the unused interface signals to function as strobe signals when
their respective column is driven by the microprocessor. The microprocessor cycles
through six steps to scan the complete Front Panel Switch matrix. Table 2-5 shows the
interface signal state and, if the signal state is an output, the switches that may be
detected as closed.
In step 1, six port bits are set to input, and the interface signal values are read. In steps 2
through 6, the bit listed as output is set to output zero, the other bits are read, and bits
indicated by a Z are ignored.
Each of the interface signals is pulled up to the +5 V dc supply by a 10 kΩ resistor in
network A2Z1. Normally, the resistance between any two of the interface signals is
approximately 20 kΩ. Checking resistances between any two signals (SWR1 through
SWR6) verifies proper termination by resistor network A2Z1.
2-44. Display
The custom vacuum-fluorescent display (A2DS1) comprises a filament, 11 grids
(numbered 0 through 10 from right to left on the display), and up to 14 anodes under
each grid. The anodes make up the digits and annunciators for their respective area of the
display. The grids are positioned between the filament and the anodes.
The filament is driven by a 5 V ac signal that is centered on a -25 V dc level. When a
grid is driven to +5 V dc, the electrons from the filament are accelerated toward the
anodes that are under that grid. Anodes under that grid that are also driven to +5 V dc are
illuminated, but the anodes that are driven to -30 V dc are not. Grids are sequentially
driven to +5 V dc, one at a time. The sequence is from GRID(0) to GRID(10), which is
right to left as the display is viewed.
2-45. Beeper Drive Circuit
The Beeper Drive circuit is controlled by U1. A 3.6-kHz square wave appears at the PPO
output of U1 and across the parallel combination of A2LS1 and A2R10, causing the
beeper to resonate.
Table 2-5. Front Panel Switch Scanning
Interface Signal States or Key Sensed
Step
SWR6 SWR5 SWR4 SWR3 SWR2 SWR1
1 A2S8 A2S17 A2S10 A2S12 A2S18 A2S13
2 A2S1 A2S2 A2S3 A2S4 A2S11 0
3 A2S7 A2S9 A2S5 A2S6 0 Z
4 A2S14 A2S15 A2S16 0 Z Z
5n/an/a0 Z Z Z
6 A2S21 0 Z Z Z Z
A2Sn indicates switch closure sensed.
0 indicates strobe driven to logic 0.
Z indicates high impedance input; state ignored.
2-46. Watchdog Timer and Reset Circuit
This circuit provides active high and active low reset signals to the rest of the system at
power-up or a system reset if the Microprocessor does not communicate with the
Display Processor for a 5-second period. The Watchdog Timer and Reset Circuit is
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