Theory of Operation
Detailed Circuit Description
2
2-9
Table 2-1. Analog Measurement Processor Pin Name Description
Pin Name Description
1 VDD +5 V supply
2 ACBO AC buffer output
3 AIN Amps input
4 AGND2 Analog ground #2
5 ACR4 AC buffer range 4
6 ACR3 AC buffer range 3
7 ACR2 AC buffer range 2
8 ACR1 AC buffer range 1
9 VSSACR -5 V supply for AC ranging
10 (not used)
11 LO A/D converter low input
12 GRD Guard
13 RRS Reference resistor sense for ohms
14 V4 Tap #4 on the DCV input divider/ohms reference network
15 V3 Tap #3 on the DCV input divider/ohms reference network
16 V1 Tap #1 on the DCV input divider/ohms reference network
17 GRD Guard
18 V2F Tap #2 active filter input on the DCV input divider/ohms reference network
19 V2 Tap #2 on the DCV input divider/ohms reference network
20 GRD Guard
21 V0 Tap #0 on the DCV input divider/ohms reference network
22 GRD Guard
23 OVS Ohms and volts sense input
24 GRD Guard
25 AGND1 Analog ground #1
26 (not used)
27 DGND Digital ground
28 FC0 Function control #0
29 FC1 Function control #1
30 FC2 Function control #2
31 FC3 Function control #3
   32 FC4 Function control #4
33 FC5 Function control #5
34 FC6 (not used)
35 FC7 (not used)
36 OSCIN Crystal oscillator input
37 OSCO Crystal oscillator output
38 MRST Master reset
39 AS Analog send
40 AR Analog receive
41 SK Serial clock
42 CS Chip select
43 BRS Baud rate select
44 VSS -5 V
45 INT Integrator output
46 SUM Integrator summing node
47 B.1 Buffer output, 100 mV range
48 B.3 Buffer output, 300 mV range
49 B1 Buffer output, 1000 mV range
50 B3 Buffer output, 3 V range