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Fuji Electric SPH Series - Section 3 System Definition

Fuji Electric SPH Series
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Section 3 System Denition
3-1 System Denition Summary ...................................................................3-1
3-2 System Conguration Denition ...........................................................3-2
3-2-1 System conguration denition ......................................................................3-2
3-3 Parameters for Main Unit ........................................................................ 3-4
3-3-1 CPU running denition ...................................................................................3-4
(1) Watch dog timer setting .................................................................................3-4
(2) Running specication at power on .................................................................3-4
(3) Battery less run ..............................................................................................3-4
(4) Constant scanning setting .............................................................................3-4
(5) I/O status latch function .................................................................................3-4
(6) LED display at built-in ash memory un-match .............................................3-4
3-3-2 CPU memory size denition ...........................................................................3-6
(1) AT range ........................................................................................................3-7
(2) Retain setting for automatically generated SFC variables .............................3-7
3-3-3 I/O group setting .............................................................................................3-8
3-3-4 Remote RUN/STOP bit setting .....................................................................3-10
3-3-5 Digital lter setting ........................................................................................ 3-11
3-3-6 High-speed counter setting ..........................................................................3-12
3-3-7 High-speed pulse output setting ...................................................................3-13

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