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Fuji Electric SPH Series - 1-7 Task Management

Fuji Electric SPH Series
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1-55
Section 1 Specications
1-7 Tasks
A task is a time schedule for program execution.
Tasks determine the sequence (time schedule) of program execution. For the MICREX-SX SPF series, the following three types
of tasks are provided: default task for cyclic processing, xed cycle tasks, and event tasks.
Programs that will always be executed need be assigned to tasks so that their execution sequence can be determined.
1-7-1 Task specications
Item Specication
Task type
Default task (cyclic processing)
Fixed cycle task
Event task
Number of tasks 1 (default) + 15 (total of xed cycle and event tasks)
Task priority 0 > 1 > 2 > 3 > 4 > 10 to 19 > Default
Item Spacial relay
Interrupt input (X0 to X15) Event ag
for rising edge
%MX1.61480.0 to %MX1.61480.15
Interrupt input (X0 to X15) Event ag
for falling edge
%MX1.61483.0 to %MX1.61483.15
Interrupt input (X0 to X15) Event ag
for rising and falling edges
%MX1.61486.0 to %MX1.61486.15
High-speed counter (CH0 to CH7) Match ag %MX1.61489.0 to %MX1.61489.7
* After a startup request is issued, xed cycle tasks and event tasks are executed according to priority during execution of a user
program of the default task.
1-7-2 Types and operations of tasks
1) Default task
Always repeat execution. Assign programs requiring no responsibility and periodicity in arithmetical operations.
Maximum 64 programs can be assigned.
• With the constant scan function, it becomes possible to make default task synchronous.
Notes:
A user WDT is the timer which monitors the execution time of the default task. It checks the time when execution has be done.
When no default task is used, the CPU processes the tasks equivalent to the default ones to execute internal processes such
as the user WDT check.
2) Fixed cycle task
• Executed once in specied cycle (setting range: from 1ms to 32s, in 1-ms steps). The programs that require high-speed
response in order to follow up control object or the programs that require being executed at constant intervals are assigned to
this task.
• A xed cycle task is given a priority of 0 to 19 (0 has the highest priority).
Maximum 8 programs can be assigned to one task.
3) Event task
• Executed once when event address (specied bit device) is set ON. In addition to ordinary bit devices, the “interrupt input”
and “high-speed counter match interrupt” that are assigned to system memory can be assigned. (Special event address)
An event task is given a priority of 0 to 19 (0 has the highest priority).
Maximum 8 programs can be assigned to one event task.
<Special event address>

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