CHAPTER 5: SETTINGS CONTROL ELEMENTS
C70 CAPACITOR BANK PROTECTION AND CONTROL SYSTEM – INSTRUCTION MANUAL 5-285
5
5.8.10.4 Breaker restrike
SETTINGS CONTROL ELEMENTS MONITORING ELEMENTS BREAKER RESTRIKE 1(3)
One breaker restrike element is provided for each DSP in the C70.
According to IEEE standard C37.100 entitled IEEE Standard Definitions for Power Switchgear, restrike is defined as “a
resumption of current between the contacts of a switching device during an opening operation after an interval of zero
current of ¼ cycle at normal frequency or longer.”
Figure 5-155: Typical restrike waveform and detection flag
The breaker restrike algorithm responds to a successful interruption of the phase current following a declaration of
capacitor bank offline as per the breaker pole indication. If a high-frequency or system frequency current with a
magnitude greater than the threshold is resumed at least ¼ of a cycle later than the phase current interruption, then a
BREAKER RESTRIKE 1
BREAKER RESTRIKE 1
FUNCTION: Disabled
Range: Disabled, Enabled
BKR RESTRIKE 1
BLOCK: Off
Range: FlexLogic operand
BREAKER RESTRIKE 1
SOURCE: SRC 1
Range: SRC 1, SRC 2, SRC 3, SRC 4, SRC 5, SRC 6
BREAKER RESTRIKE 1
PICKUP: 0.50 pu
Range: 0.10 to 2.00 pu in steps of 0.01
BREAKER RESTRIKE 1
RST DELAY: 0.100 s
Range: 0.000 to 65.535 s in steps of 0.001
BREAKER RESTRIKE 1
HF DETECT: Enabled
Range: Disabled, Enabled
BKR RSTR 1 BKR OPEN:
Off
Range: FlexLogic operand
BKR RSTR 1 OPEN CMD:
Off
Range: FlexLogic operand
BKR RSTR 1 CLS CMD:
Off
Range: FlexLogic operand
BREAKER RESTRIKE 1
TARGET: Self-reset
Range: Self-reset, Latched, Disabled
BREAKER RESTRIKE 1
EVENTS: Disabled
Range: Disabled, Enabled
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