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Infineon Technologies TLE5012B - Interface Mode3 Register

Infineon Technologies TLE5012B
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TLE5012B
SSC Registers
User’s Manual 90 Rev. 1.2, 2018-02
Interface Mode3 Register
MOD_3 Offset Reset Value
Interface Mode3 Register 09
H
device-specific
Field Bits Type Description
ANG_BASE 15:4 w Angle Base
Sets the 0° angle position (12 bit value). Angle base is
factory-calibrated to make the 0° direction parallel to the
edge of the chip.
800
H
-180°
000
H
7FF
H
+179.912°
Reset: device-specific
SPIKEF 3 w Analog Spike Filter of Input Pads
Filters voltage spikes on input pads (IFC, SCK and CSQ).
Additional delay of 10 µs for data input.
0
B
spike filter disabled
1
B
spike filter enabled
Reset: derivate-specific
SSC_OD 2 w SSC-Interface Data Pin Output Mode
0
B
Push-Pull
1
B
Open Drain
Reset: 0
B
PAD_DRV 1:0 w Configuration of Pad-Driver
00
B
IFA/IFB/IFC: strong driver, DATA: strong driver,
fast edge
01
B
IFA/IFB/IFC: strong driver, DATA: strong driver,
slow edge
10
B
IFA/IFB/IFC: weak driver, DATA: medium driver,
fast edge
11
B
IFA/IFB/IFC: weak driver, DATA: weak driver, slow
edge
Reset: derivate-specific
15 8
7 0
15
w
ANG_BASE
74
w
ANG_BASE
33
w
SPIKEF
22
w
SSC_OD
10
w
PAD_DRV

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