Intel® Server Board M10JNP2SB User Guide
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4.2 General Memory Population Rules
The following memory population rules apply when installing DIMMs:
• When only one DIMM is used in the channels A or B, it must be populated in the black DIMM slot.
• Mixing DIMMs of a different type or rank organization is not supported
Table 4 lists the recommended DIMM populations for the server board.
Table 4. DIMM population recommendations
4.3 Memory RAS Features
Each processor within the Intel® Xeon® E-2200 processor family has support for advanced memory RAS
features as defined in Table 5.
Table 5. Memory RAS features
x8 Single Device Data Correction (SDDC) via static virtual
lockstep (Applicable to x8 DRAM DIMMs)
Adaptive Data Correction (SR) (Applicable to x4 DRAM DIMMs)
x8 Single Device Data Correction + 1 bit (SDDC+1) (Applicable
to x8 DRAM DIMMs)
SDDDC + 1, and ADDDC (MR) + 1 (Applicable to x4 DRAM
DIMMs)
Full Memory Mirroring: An intra IMC method of keeping a
duplicate (secondary or mirrored) copy of the contents of
memory as a redundant backup for use if the primary memory
fails. The mirrored copy of the memory is stored in memory of
the same processor socket's IMC. Dynamic (without reboot)
failover to the mirrored DIMMs is transparent to the OS and
applications.
Address Range/Partial Memory Mirroring: Provides further intra
socket granularity to mirroring of memory by allowing the
firmware or OS to determine a range of memory addresses to
be mirrored, leaving the rest of the memory in the socket in
non-mirror mode.
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