Intel® Server Board M10JNP2SB User Guide
50
Reserved for future AMI SEC error codes
SEC Beep Codes
None
Table 26. PEI phase
Pre-memory CPU initialization is started
Pre-memory CPU initialization (CPU module specific)
Pre-memory CPU initialization (CPU module specific)
Pre-memory CPU initialization (CPU module specific)
Pre-memory North Bridge initialization is started
Pre-Memory North Bridge initialization (North Bridge module
specific)
Pre-memory North Bridge initialization (North Bridge module
specific)
Pre-Memory North Bridge initialization (North Bridge module
specific)
Pre-memory South Bridge initialization is started
Pre-Memory South Bridge initialization (South Bridge module
specific)
Pre-memory South Bridge initialization (South Bridge module
specific)
Pre-Memory South Bridge initialization (South Bridge module
specific)
OEM pre-memory initialization codes
Memory initialization. Serial Presence Detect (SPD) data reading
Memory initialization. Memory presence detection
Memory initialization. Programming memory timing information
Memory initialization. Configuring memory
Memory initialization (other)
Reserved for ASL (see ASL Status Codes section below)
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