98 Chapter 4: Matrox Solios hardware reference
Dedicated Processing FPGA memory
When you purchase a Matrox Solios with a Processing FPGA, the board also comes
with the following memory, which can only be accessed through the Processing
FPGA:
• 64/128/256 Mbytes of DDR SDRAM at 1.33 Gbytes/sec (2 x 64 bits x
83.3 MHz).
• 4/8 Mbytes of QDRII SRAM at 666 Mbytes/sec input, and 666 Mbytes/sec
output (2 x 32 bits x 83.3 MHz, in each direction).
Although the board comes with dedicated Processing FPGA memory, the
Processing FPGA can also access acquisition memory through its high-speed serial
interface.
Debugging
To interface with the Processing FPGA for debugging and probing internal signals,
Matrox Solios boards purchased with the Processing FPGA feature a 10-pin male
JTAG connector. For further details on the JTAG connector, see the section JTAG
connector in Appendix B: Technical information.
Video to PCI-X bridge
The video to PCI-X bridge is capable of high-speed transfers to acquisition
memory, to the optional Processing FPGA, and through the PCI-X to
PCI-X/PCIe bridge, to Host memory, off-board display memory, or other devices
across the Host bus. Upon transmitting the video data, the video to PCI-X bridge
can also format the data as follows:
• Image resizing. Captured image data can be cropped (ROI capture) or
subsampled. This can be useful to implement custom software-based motion
detection because at a reduced scale, image comparison is faster.
For all versions of Matrox Solios except Matrox Solios GigE, the video to PCI-X
bridge can arbitrarily subsample image data to 1/16th of a field or frame. For
Matrox Solios GigE, the video to PCI-X bridge can subsample incoming image
data by an integer factor of 1 to 15, except when converting images to BGR-30,
YUV-20, or YCbCr-20 output format; for these formats, no subsampling is
supported.
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