Matrox Solios Series - Technical Features of Matrox Solios GigE

118 Appendix B: Technical information
Technical features of Matrox Solios GigE
• PCIe short board; Matrox Solios GigE has a x4 PCIe connector.
• Supports frame and line-scan video sources.
• Captured data can be converted into many different pixel formats. See Supported
video sources for more information.
• Supports a x4 or greater PCIe Host interface.
• Supports acquisition from up to four GigE Vision video sources connected onto
four GigE-compliant Ethernet ports.
• 64/128/256 Mbytes of 100 MHz DDR SDRAM used as acquisition memory.
1.6 Gbytes/sec of memory bandwidth.
• Eight TTL auxiliary output signals (exposure or user-defined output). See the
Matrox Solios hardware reference chapter for supported configurations.
• Four TTL auxiliary I/O signals (timer-trigger, timer-clock, or user-defined input,
or exposure or user-defined output). See the Matrox Solios hardware reference
chapter for supported configurations.
• Two LVDS auxiliary input signals (timer-trigger, timer-clock, or user-defined
input). See the Matrox Solios hardware reference chapter for supported
configurations.
• Four opto-isolated auxiliary input signals (timer-trigger, timer-clock, or
user-defined input). See the Matrox Solios hardware reference chapter for supported
configurations.
Optional features for Matrox Solios boards
• Processing FPGA
1
. The Processing FPGA can be either the Altera Stratix I EP1S30
or the Altera Stratix I EP1S40. These have 32,470 and 41,250 logic elements,
respectively. The Processing FPGA can come with either 4 or 8 Mbytes of QDRII
SRAM. It can also come with 64, 128, or 256 Mbytes of DDR SDRAM.
1. The Processing FPGA option is not available for Matrox Solios eCL/XCL-B,
eA/XA Single, nor the 66 MHz version of the Matrox Solios eCL/XCL dual-Base/sin-
gle-Medium.