Motorola APX 2000 Detailed Service Manual

3-34 Theory of Operation: Controller
3.2.4.8.2 Audio SSI
OMAP's McBSP1 interface is configured as a SSI interface dedicated to carry transmit and receive
audio data to peripheral devices. The peripherals connected to this bus include MAKO, Audio
CODEC and CPLD. The bus also connects to the keypad board. MAKO generates the clock and
frame sync signals for this bus.
Figure 3-23. Audio SSI Configuration
3.2.4.8.3 ARM SPI
This SPI interface is controlled by OMAP's ARM core. Devices connected to this bus include MAKO,
display controllers and the audio CODEC.
3.2.4.8.4 DSP SPI
This SPI interface is controlled by the DSP core of the OMAP processor. This bus is used to
configure and control devices on the RF deck.
OMAP
MACE
MCBSP1
SSC 0
(Black)
SSC 1
( Red )
BLACK or
RED RX
RED RX
RED TX
CODECs
CPLD
BLACK or
RED TX
0
0
1
1
Mux A
PA 28 (GPIO)
Hi_Sec */Normal
SSC 2
(Sniffer)
RD 2
RD 0
TD 0
RD 1
TD 1
TD 3
Mux B
Keypad Board
Main Board

Motorola APX 2000 Specifications

General

IP Rating	IP67
Operating Temperature	-30°C to +60°C
GPS	Optional
Bluetooth	No
Frequency Range	700/800 MHz
Power Output	1-5 W (VHF), 1-3 W (700/800 MHz)
Channels	Up to 1, 000
Battery Life	Up to 10 hours (digital)
Digital Protocol	APCO P25
Frequency	VHF: 136-174 MHz, UHF: 380-470 MHz, 700/800 MHz: 764-870 MHz
Power	1-3W (700/800 MHz), 1-5W (VHF)