LPCXpresso boards for LPC546xx/LPC540xx/LPC54S0xx families of
MCUs
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017-2019. All rights reserved.
Rev. 2.1 — 7th January 2019
ISP / User buttons
These switches can be used to force the LPC546x8/540xx/54S0xx in to
ISP boot modes, as shown below. Note that ISP boot is also affected by
OTP bit settings, and behavior will also be modified based on port
activity as the boot ROM executes. Refer to the device User Manual for
more information. Signal is low when the button is pressed.
LPC546xx boot modes:
LPC540/54S0xx boot modes:
Auto boot:
If OTP BOOT_SRC not set,
LPC540xx/LPC54S0xx will look for a
valid image in SPIFI flash, external SPI
flash then external parallel memory. If
not image is found, ISP boot will
commence.
SPI Boot:
Boot from SPI NOR flash connected to
Flexcomm 0. If no valid image is found,
ISP boot will commence.
SPIFI boot:
Boot from QSPI NOR flash device
connected to SPIFI interface. If no valid
image is found, ISP boot will
commence.
USB0 (full speed) ISP DFU
USB1 (high speed) ISP DFU
The ISP pins are sampled by the LPC546x8/540xx/54S0xx boot ROM
code immediately following reset, so to initiate an ISP boot press and
hold the required ISP buttons while pressing and releasing the reset
button (SW1.)
Following reset, these buttons may also be used by a user application.
Note: A board power cycle (holding down ISP required buttons while
power is applied) may be required to ensure correct driving of the ISP
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