NXP Semiconductors QorIQ T1040 - 2.6 SerDes port

Table 2-1. DDR3L UDIMM support (continued)
Dual Micron MT18KSF51272AZ-1G6
Quad (TBD)
2.6 SerDes port
The T1040 SerDes block provides eight high-speed serial communication lanes
supporting a variety of protocols, including:
•
SGMII 1.25 Gbit/s
• QSGMII 5 Gbit/s
• PCIe Gen 1 x1 2.5 Gbit/s
• PCIe Gen 2 x1 5 Gbit/s
• SATA x1 1.5/3 Gbit/s
The following table explains the SerDes protocols supported on the T1040RDB board.
Table 2-2. SerDes protocol distribution
SerDes
SRDS_PRTCL A B C D E F G H Option
T1040/T1020 PCIe SGMII QSGMII QSGMII PCIe PCIe PCIe SATA 0x66
To comply with T1040 specifications, multiplexers are used to re-route and group the
SerDes lanes as shown in the figure below.
SerDes port
QorIQ T1040 Reference Design Board User Guide, Rev. 0, 06/2015
20 Freescale Semiconductor, Inc.