EasyManua.ls Logo

Philips Q528.1E - SSB Bottom View; SSB Cell Layout; SSB Top View

Philips Q528.1E
166 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Circuit Descriptions, Abbreviation List, and IC Data Sheets
EN 123Q528.1E LA 9.
Sets with all resolutions @ 50 Hz use the PNX8535 SoC, the
PNX5050 Video Back-end Processor and the T6TF4HFG
PACIFIC 3 for video processing. With the same configuration,
a resolution of 1366x768p @ 100 Hz or 1920x1080p @ 50 Hz
can be achieved. To achieve 1920x1080p in combination
with 100 Hz however, an additional panel is used for Dynamic
Frame Insertion (DFI). This DFI panel also contains an extra
EPLD to drive the AmbiLight units.
Refer to section “Video Processing” in this chapter for more
details.
9.1.3 SSB Cell Layout
Figure 9-2 SSB top view
Figure 9-3 SSB bottom view
H_16800_123.eps
090507
ANALOG I/O
TUNER
DIGITAL I/OCOMMON INTERFACE
SERVICE
CONN.
HDMI
PNX8535
PNX5050
AUDIO CLASS - D
DC - DC CONVERSION
ON-BOARD PLATFORM SUPPLY
H_16800_124.eps
090507
PACIFIC 3
CHANNEL
DECODER
MASTER
IF

Table of Contents

Related product manuals