Philips Q528.1E - Digital Signal Processing (Front-End); DVB-T Signal Broadcast Reception Block Diagram

Circuit Descriptions, Abbreviation List, and IC Data Sheets
EN 131Q528.1E LA 9.
9.5.3 Digital signal processing (front-end)
Refer to figure “DVB-T signal broadcast reception block
diagram” for details of digital signal processing.
Figure 9-9 DVB-T signal broadcast reception block diagram
Signal AGC
H_16770_118.eps
280307
CVBS (33)
PNX8535
5V
Line ar
Regulat
or
LOW-DIF (4MHz)
SIF
27MH z XTA L
IIC-1 IIC-2
1V2 3V3 1V8
+12V
LD
O
Dual
DC/DC
Dual
DC/DC
1V2 3V3
LD
O
1V8
Enable 3V 3
Enable 1V 2
IIC-3 IIC-4
High=On
3V3
ADC
ADC
Optio n
100 kHz
+5V5-TUN
C0h
DIGIFDIGIF
MUXMUX
Sound IO: LRin 1 2 3 4 5 Lrout 1 2 3 4 SPDIF i n out
MOD E
MUX
MOD E
MUX
SRC’s 1,2,3,4 SRC’s 1,2,3,4
VIDDEC
&
COMB
VIDDEC
&
COMB
ME MOR YME MOR Y
SIF
CVBS
NOT USED
SAICOSAICO
SIF
DEMDEC
SIF
DEMDEC
Sound Part
or CVBS from aixy
ADC2
ADC1
MUX
MUX
ADC3
DENC
DAC1
DAC2
ADC4
TDA10048
ADC
10bit
FFT
DEMOD
IQ CONV
&
ACI FILT
DVB-T
FEC
Ouput
Interf ace
Master
PLL
GPIO0: 2 1
DIF: VIP,V IM: 6 2,62
RF AGC: 1
IF AGC: 2
3,4
IIC
1V8 3V3
Master
8,6
IIC
Sla ve
10, 11
Address
DSP
SYNCHRO
Xin, X out 44, 45
GPIO1: 2 3 GPIO2: 2 5
GPIO3: 2 6
4 ΣΔ
GPIO
JTAG
16h
TDA10048
ADC
10bit
FFT
DEMOD
IQ CONV
&
ACI FILT
DVB-T
FEC
Ouput
Interf ace
Master
PLL
GPIO0: 2 1
DIF: VIP,V IM: 6 2,62
RF AGC: 1
IF AGC: 2
3,4
IIC
1V8 3V3
Master
8,6
IIC
Sla ve
10, 11
Address
DSP
SYNCHRO
Xin, X out 44, 45
GPIO1: 2 3 GPIO2: 2 5
GPIO3: 2 6
4 ΣΔ
GPIO
JTAG
TDA10048
ADC
10bit
FFT
DEMOD
IQ CONV
&
ACI FILT
DVB-T
FEC
Ouput
Interf ace
Master
PLL
GPIO0: 2 1
DIF: VIP,V IM: 6 2,62
RF AGC: 1
IF AGC: 2
3,4
IIC
1V8 3V3
Master
8,6
IIC
Sla ve
10, 11
Address
DSP
SYNCHRO
Xin, X out 44, 45
GPIO1: 2 3 GPIO2: 2 5
GPIO3: 2 6
4 ΣΔ
GPIO
JTAG
16h
Side Band
Filter
Side Band
Filter
SIF AGCSIF AGC
Nyquist
Filter
Nyquist
Filter
VIF AGCVIF AGC
Band P ass
Filter
Band P ass
Filter
Sound
Trap
Sound
Trap
Group
Delay
Group
Delay
IF1 (9,10) IF3 (3, 4) IF2 (6, 7)
TDA9898
CVBS (33)
AM & FM
Demo dul ator
AM & FM
Demo dul ator
OUT1=SIF 26, 27 OUT2=DIF 29, 30 AUD ( 31)
VIFAGC ( 12)AGCVIN (45)
PLL
AGCDIN (36)
TOP
TAGC (47)
PEAK AGC
4MHz Ref In
23, 24 IIC
43, 44
5V
25 Address Sel ect
MPP2 (1 6)
VIFAFC
T-AGC
12 MPP1
L AGCL AGC
43h
TD1716
2
NC
PLL 4MHz
RF in
3
AGC
8 REF
IF 1110
5V t o
33V
9
5V
4
LNAHPF
6,7
IIC
5
Address Sel ect
C0h
TD1716
2
NC
PLL 4MHz
RF in
3
AGC
8 REF
IF 1110
5V t o
33V
9
5V
4
LNAHPF
6,7
IIC
5
Address Sel ect
TD1716
2
NC
PLL 4MHz
RF in
3
AGC
8 REF
IF 1110
5V t o
33V
9
5V
4
LNAHPF
6,7
IIC
5
Address Sel ect
C0h
TS
TS- MU X
CA-CI
TS- MU X
CA-CI
PCMCIA
7MH z
X7060L EPCOS
DIP18D
36. 12 5MHz
7MH z
X7060L EPCOS
DIP18D
36. 12 5MHz
InternalIntern al
DIF AGC
TUN
AGC