R8C/1A Group, R8C/1B Group 12. Interrupts
Rev.1.30 Dec 08, 2006 Page 90 of 315
REJ09B0252-0130
12.1.6.10 Interrupt Priority Judgement Circuit
The interrupt priority judgement circuit selects the highest priority interrupt, as shown in Figure 12.10.
Figure 12.10 Interrupt Priority Level Judgement Circuit
Compare 0
INT3
Timer Z
Timer X
INT0
Timer C
INT1
UART1 receive
Compare 1
A/D conversion
UART1 transmit
Key input
IPL
Priority level of each interrupt
Level 0 (default value)
Lowest
Highest
Priority of peripheral function interrupts
(if priority levels are same)
Interrupt request level
judgment output signal
Interrupt
request
acknowledged
I flag
Address match
Watchdog timer
Oscillation stop detection
Voltage monitor 2
UART0 transmit
UART0 receive
NOTE :
1. The IICSEL bit in the PMR register switches functions.
SSU / I
2
C bus
(1)