R8C/1A Group, R8C/1B Group 18. Flash Memory
Rev.1.30 Dec 08, 2006 Page 261 of 315
REJ09B0252-0130
18.4.3 Software Commands
The software commands are described below. Read or write commands and data in 8-bit units.
SRD: Status register data (D7 to D0)
WA: Write address (ensure the address specified in the first bus cycle is the same address as the write
address specified in the second bus cycle.)
WD: Write data (8 bits)
BA: Given block address
×: Any specified address in the user ROM area
18.4.3.1 Read Array Command
The read array command reads the flash memory.
The MCU enters read array mode when FFh is written in the first bus cycle. When the read address is entered in
the following bus cycles, the content of the specified address can be read in 8-bit units.
Since the MCU remains in read array mode until another command is written, the contents of multiple
addresses can be read continuously.
In addition, the MCU enters read array mode after a reset.
18.4.3.2 Read Status Register Command
The read status register command is used to read the status register.
When 70h is written in the first bus cycle, the status register can be read in the second bus cycle. (Refer to
18.4.4 Status Register.) When reading the status register, specify an address in the user ROM area.
Do not execute this command in EW1 mode.
The MCU remains in read status register mode until the next read array command is written.
18.4.3.3 Clear Status Register Command
The clear status register command sets the status register to 0.
When 50h is written in the first bus cycle, bits FMR06 to FMR07 in the FMR0 register and SR4 to SR5 in the
status register are set to 0.
Table 18.4 Software Commands
Command
First Bus Cycle Second Bus Cycle
Mode Address
Data
(D7 to D0)
Mode Address
Data
(D7 to D0)
Read array Write × FFh
Read status register Write × 70h Read × SRD
Clear status register Write × 50h
Program Write WA 40h Write WA WD
Block erase Write × 20h Write BA D0h
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