Renesas R8C series

R8C/1A Group, R8C/1B Group 14. Timers
Rev.1.30 Dec 08, 2006 Page 134 of 315
REJ09B0252-0130
Figure 14.19 Registers TZMR and PUM in Programmable One-Shot Generation Mode
Timer Z Waveform Output Control Register
Symbol Address After Reset
PUM
0084h 00h
Bit Symbol Bit Name Function RW
INT0
_
____
pin one-shot trigger 0 : INT0
_
____
pin one-shot trigger disabled
control bit
(1)
1 : INT0
_
____
pin one-shot trigger enabled
INT0
_
____
pin one-shot trigger
polarity select bit
(2)
NOTES :
1.
2.
b3 b2
INOSTG
b1 b0
0
—
(b4-b0)
00
0 : Outputs one-shot pulse “H”.
Outputs “L” w hen the timer is stopped.
1 : Outputs one-shot pulse “L”.
Outputs “H” w hen the timer is stopped.
b7 b6 b5 b4
00
RW
INOSEG RW
RW
TZOPL RW
0 : Falling edge trigger
1 : Rising edge trigger
Reserved bits Set to 0.
Timer Z output level latch
Set the INOSTG bit to 1 after the INT0EN bit in the INTEN register and the INOSEG bit in the PUM
The INOSEG bit is enabled only w hen the INT0PL bit in the INTEN register is set to 0 (one edge).
INT0F1 bits in the INT0F register. Set the INOSTG bit to 0 (INT0
_
____
pin one-shot trigger disabled) after the
TZS bit in the TZMR register is set to 0 (count stops).
register are set. When setting the INOSTG bit to 1 (INT0
_
____
pin one-shot trigger enabled), set the INT0F0 to
Timer Z Mode Register
Symbol Address After Reset
TZMR
0080h 00h
Bit Symbol Bit Name Function RW
NOTES :
1.
2. Refer to
14.2.5 Notes on Timer Z
for precautions regarding the TZS bit.
b0
When the TZS bit is set to 1 (count starts), the count value is w ritten to the reload register only. When the TZS bit is
set to 0 (count stops), the count value is w ritten to both reload register and counter.
TZWC
TZS
Timer Z w rite control bit Set to 1 in programmable one-shot generation
mode.
(1)
0
b3 b2 b1
0
TZMOD1
b7 b6 b5 b4
110
Timer Z count start flag
(2)
0 : Stops counting.
1 : Starts counting.
0
—
(b3-b0)
Reserved bits
RW
RW
0
Set to 0.
RW
Timer Z operating mode bit
b5 b4
1 0 : Programmable one-shot generation mode
RW
TZMOD0 RW