R8C/1A Group, R8C/1B Group 16. Clock Synchronous Serial Interface
Rev.1.30 Dec 08, 2006 Page 219 of 315
REJ09B0252-0130
Figure 16.38 Operating Timing in Slave Transmit Mode (I
2
C bus Interface Mode) (2)
SDA
(slave output)
SCL
(master output)
12
8967453
b7
b6
b5
b4
b3
b2
b1
b0
SDA
(master output)
TDRE bit in
ICSR register
1
0
TEND bit in
ICSR register
1
0
ICDRT register
ICDRS register
Data n
Processing
by program
(3) Set TEND bit to 0
A
9
A
Data n
Slave receive
mode
Slave transmit mode
TRS bit in
ICCR1 register
1
0
ICDRR register
(4) Dummy-read of ICDRR register
after setting TRS bit to 0
(5) Set TDRE bit to 0
SCL
(slave output)