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Schweitzer Engineering Laboratories SEL-321 - Page 207

Schweitzer Engineering Laboratories SEL-321
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Date Code 20011026 Applications 5-31
SEL-321/321-1 Instruction Manual
SETTINGS SHEET Page 5 OF 10
FOR THE SEL-321/321-1 RELAY Date
(5 A
NOMINAL RELAY)
Voltage Element Settings
Enable Voltage Elements: (Y/N) EVOLT = N
Zero-Sequence Over-Voltage: (0 - 150 V sec., 3V0) 59N =
Bus Phase Under-Voltage: (0 - 100 V sec.) 27L =
Bus Phase Over-Voltage: (0 - 100 V sec.) 59L =
Positive-Sequence Bus Over-Voltage: (0 - 150 V sec., V1) 59PB =
Positive-Sequence Bus Over-Voltage Time Delay (TDPU): (0 - 8000 cyc) 59PBD =
Positive-Sequence Remote Bus Over-Voltage: (0 - 150 V sec., V1) 59PR =
Current Comp. Remote Over-Voltage Time Delay (TDPU): (0 - 8000 cyc) 59PRD =
Current Compensated Remote Overvoltage Adjustment: (0 - 2 unitless) a1 =
Time Step Backup Time Delay Settings
Zone 2 Phase Long Time Delay (TDPU): (0 - 2000 cycles) Z2PD = 20.00
Zone 3 Phase Time Delay (TDPU): (0 - 2000 cycles) Z3PD = 0.00
Zone 4 Phase Time Delay (TDPU): (0 - 2000 cycles) Z4PD =
Zone 2 Ground Long Time Delay (TDPU): (0 - 2000 cycles) Z2GD = 20.00
Zone 3 Ground Time Delay (TDPU): (0 - 2000 cycles) Z3GD = 0.00
Zone 4 Ground Time Delay (TDPU): (0 - 2000 cycles) Z4GD =
Level 1 Residual Time Delay (TDPU): (0 - 2000 cycles) 67NL1D =
Level 2 Residual Long Time Delay (TDPU): (0 - 2000 cycles) 67NL2D =
Level 3 Residual Time Delay (TDPU): (0 - 2000 cycles) 67NL3D =
Level 4 Residual Time Delay (TDPU): (0 - 2000 cycles) 67NL4D =
Level 1 Negative-Sequence Time Delay (TDPU): (0 - 2000 cycles) 67QL1D =
Level 2 Negative-Sequence Long Time Delay (TDPU): (0 - 2000 cycles) 67QL2D =
Level 3 Negative-Sequence Time Delay (TDPU): (0 - 2000 cycles) 67QL3D =
Level 4 Negative-Sequence Time Delay (TDPU): (0 - 2000 cycles) 67QL4D =
Permissive Overreaching Scheme Settings
Enable Permissive Overreaching Transfer Trip Scheme: (Y/N) EPOTT = Y
Zone 3 Reverse Block Time Delay (TDDO): (0 - 2000 cycles) Z3RBD = 5.00
Echo Block Time Delay (TDDO): (OFF, 0 - 2000 cycles) EBLKD = 10.00
Echo Time Delay Pickup Time Delay (TDPU): (OFF, 0 - 2000 cycles) ETDPU = 2.00
Echo Duration Time Delay (TDDO): (0 - 2000 cycles) EDURD = 4.00
Weak-Infeed Enable: (Y/N) EWFC =
Directional Comparison Unblocking Scheme Settings
Enable DCUB: (Y/N) EDCUB = N
Guard Present Security Time Delay (TDDO): (0 - 2000 cycles) GARD1D =
DCUB Disabling Time Delay (TDPU): (0.25 - 2000 cycles) UBDURD =
DCUB Duration Time Delay (TDPU): (0 - 2000 cycles) UBEND =

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