CAUSE OF INTERR.
ISTACK
ID
Meaning (called error OB)
Table 5-6 continued:
WEFEH Collision of timed interrupts caused by the hardware
clock (OB 33):
timed interrupt clock was masked (ignored)
for too long
PEU I/Os not ready = power failure in expansion unit:
After a statically pending PEU signal is removed
(expansion unit is switched on), the system
program always calls OB 22 (AUTOMATIC
WARM RESTART).
HALT Multiprocessor STOP mode:
a) selector switch on the coordinator (COR) is
in the STOP position
b) another CPU entered the STOP mode in
multiprocessing.
Control Bits and Interrupt Stack
CPU 948 Programming Guide
5 - 18 C79000-G8576-C848-04
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