Reaction:
The system program calls OB 33 as user interface, if this is loaded.
Here, you can program the reaction to this state.
If OB 33 is not loaded, the CPU continues processing the program.
PG display with "OUTPUT ISTACK":
The bit WEFEH is marked in the control bits.
When the system program calls OB 33, a code for the collision of
timed interrupts is transferred to ACCU-1-L (see Section 4.5.3).
Note
In the "process interrupt via IB 0" mode and "interruptability at
block boundaries" the step address counter (SAC) does not point
to the block at whose boundary (BE statement) the collision of
timed interrupts took place. It points to the block that called the
block that caused the error (return address).
As long as an error is pending or reoccurs every time the STEP 5
operation in question is processed in each scan, the appropriate
error organization block is always called.
This can increase the cycle time considerably, depending on the
duration of error handling by the system program and of
processing time of the organization block.
Causes of Error and Reactions of the CPU
CPU 948 Programming Guide
C79000-G8576-C848-04
5 - 31
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