Siemens CPU 948 User Manual

Result You can evaluate the result of the TSC operation using condition
codes CC 0 and CC 1:
CC 1 CC 0 Description
0
1
0
0
0
1
The "occupied" register contains ’0’. The CPU
enters its own slot ID.
The slot ID of the CPU is already entered in
the "occupied" register.
The "occupied" register contains a
different slot ID.
Note
All CPUs that require synchronized access to a common global
memory area (dual-port RAM area) must use the TSC operation.
Error reaction The location must be on the corresponding module and on the
common page between F F400H and F FBFFH. If this is not the case,
the CPU recognizes a transfer error (TRAF) and calls OB 32. If
OB 32 is not loaded, the CPU changes to the stop mode with the error
code TRAF (ISTACK).
Load and transfer
operations for the
dual-port RAM memory
organized
in bytes
Operation Operand Description
LY CB
LY CW
LY CD
-32768 to
+32767
-32768 to
+32767
-32768 to
+32767
add the specified constant to content
of the BR register and load the byte
addressed in this way in the open page
into ACCU-1-LL
1) 3)
add the specified constant to content
of the BR register and load the word
addressed in this way in the open page
into ACCU-1-L
2) 3)
add the specified constant to content
of the BR register and load the double
word addressed in this way in the open
page into ACCU 1
3)
Table 9-11 Operations for access to pages organized in bytes
Operations with the Base Address Register (BR Register)
CPU 948 Programming Guide
C79000-G8576-C848-04
9 - 31

Siemens CPU 948 Specifications

General

Brand	Siemens
Model	CPU 948
Category	Controller
Language	English