Operation / Processing CPU 948 CPU 928B
Time-driven program execution
Cycle time extension from nesting an empty OB 13
(without STEP 5 operations) at a block boundary
287
µs
310
µs for the 1st timed
int. OB
170
µs for each further
timed int. OB due at the
same time
Clock rate for time-driven program
(timed interrupts OB 10 to OB 18)
Variable
basic clock rate
from 1 to 255 ms.
Spec. in steps of
10 ms:
10, 20, 50, 100
200, 500 ms,
1, 2, 5 s
or
10, 20, 40, 80, 160,
320, 640 ms,
1.28, 2.56 s
10, 20, 50, 100,
200, 500 ms,
1, 2, 5 sec
Resolution for clock-driven timed interrupts
(OB 9)
every minute,
hourly,
daily,
weekly,
monthly,
yearly,
once
every minute,
hourly,
daily,
weekly,
monthly,
yearly,
once
Resolution for delayed interrupt (OB 6) 1 ms 1 ms
Cycle time monitoring
Default
selectable between
triggerable
200 ms
1 to 2550 ms
yes
150 ms
1 to 13000 ms
yes
Memory sizes
Size of the user memory module
(in Kbytes) 640 or
1664
64
Size of memory for data blocks (DB-RAM, in
Kbytes)
– approx. 46.6
Timers, counters and flags
Number of timers and counters 256 of each 256 of each
Number of flags 2048 flags
+ 32768 S flags
2048 flags
+ 8192 S flags
Appendix 3: Technical Data of the CPU 948 and CPU 928B
CPU 948 Programming Guide
12 - 8 C79000-G8576-C848-04