Sony HCD-M90 - Schematic Diagram - DAC Board; DAC Board Circuit Diagram

HCD-M90
5959
FB300
R327
R328
FB311
FB313
FB314
FB315
FB316
FB317
FB318
FB319
FB320
FB321
FB322
R329
D305
D304
FB301
C320
Q306
R323
D303
R326
R305
FB302
R313
C315
C316
C313
C314
FB305
C312
C311
IC302
R308
R307
R315C307
C308
C309
FB303
C310
FB304
R312
R310
R309
C301
IC301
C319
R316
Q302
C318
C317
Q303
R304
Q307
C302
C306
FB306
FB307
FB308
FB309
FB310
R319
C330
R303
C305
JR311
R320
CN300
CN301
100
0
100k
1SS355TE-17
1SS355TE-17
0.1
SRC1202S
2.2k
1SS355TE-1
10k
0
1k
0.1
47
16V
0.1
100
6.3V
0.1
100
6.3V
10k
10k
00.1
0.1
100
6.3V
0.1
100
10k
2.2k
0.1
TC7WU04FU
0.001
0
2SA1037AK
47
16V
0.1
SRC1202S
0
2SA1037AK
100
6.3V
100
6.3V
330p
100
0.47
50V
0
0
5P
13P
DGND
RESET
MUTE
LOCK
NC
SPDIF0
SPDIF1
VOUTL
VOUTR
VDDA(DAC)
IIS-EXT-SEL
SPDIF-SEL
VDDD
VSSE
VSSD
NC
L3-DATA
L3-CLK
IIS-IN-SD
IIS-IN-BCK
IIS-IN-WS
L3-MODE
TEST1
VREF
VDDI
NC
VSSA(DAC)
VSSI
CLK-OUT
PREEM-OUT1
VSSA(PLL)
VDDA(PLL)
TEST2
NC
NC
NC
VDDE
TEST3
IIS-OUT-SD
IIS-OUT-WS
PREEM-OUT0
LOUT
ROUT
AGND
DOUT
SELCHAN
PLLPWR
A3.3V
DGND
DINSEL
SYS 3.3V
MUTE-IN
VCC
GND
INVERTER
BCK
LRCLK
SDATA
SPDIF
PLL-LOCK DETECT
DAC_RESET
B+ SWITCH
D/A CONVERTER
DATA SELECT
SWITCH
PLL LOCK DETECT
Q306,307
IIS-
OUT-BCK
PLL-SEL
SEL-
STATIC
µDA1350AH
6-31. SCHEMATIC DIAGRAM – DAC Board – • See page 82 for Waveforms. • See page 85 for IC Block Diagram.
•Voltages and waveforms are dc with respect to ground
under no-signal conditions.
no mark : DVD PLAY
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