Spirent SmartBits System - SmartBits Compliance with CE Requirements

Appendix B: Auto Negotiation
Summary of MII Registers and Bit Definitions
SmartBits System Reference 205
Table C-3. Bit Definitions for MII Register 0 (Control)
Bit Name Description
15 PHY Reset 1 = PHY reset
0 = Normal operation
14 Enable Loopback 1 = Enable loopback mode
0 = Disable loopback mode
13 Speed Selection Bit 6
Bit 13 Meaning
11 Reserved
1 0 1000Mbps
0 1 100Mbps
0 0 10Mbps
12 Auto Negotiation Enable 1 = Enable AN
0=DisableAN
11 Power Down 1 = Power down
0 = Normal operation
10 Isolate 1 = Electrically isolate PHY from MII or GMII
0 = Normal operation
9 Restart Auto Negotiation 1 = Restart AN
0 = Normal operation
8 Duplex mode 1 = Full duplex
0 = Half duplex
7 Collision Test 1 = Enable COL signal test
0 = Disable COL signal test
6 Speed selection Bit 6
Bit 13 Meaning
11 Reserved
1 0 1000Mbps
0 1 100Mbps
0 0 10Mbps
5-0 Reserved Write as 0, ignore on Read