Appendix F: SMB-200/2000 Cables and Connectors
Ethernet Connectors
234 SmartBits System Reference
Table B-1. 80-Pin Connector Assignments
I/O Pin
Signal Name
Pin
Signal Name
RMII SMII RMII SMII
O 1 3VCC 3VCC 41 3VCC 3VCC
O 2 5VCC 5VCC 42 5VCC 5VCC
O3
REF_CLK+ REF_CLK+ 43 REF_CLK– REF_CLK–
O4
GND GND 44 GND GND
O5
DNC (Note 5) SYNC+ 45 DNC (Note 5) SYNC–
O6
/SMII (Note 1) /SMII (Note 1) 46 /BRDCON (Note 2) /BRDCON (Note 2)
O7
TXD1_0+ TXD1+ 47 TXD1_0– TXD1–
O8
TXD1_1+ DNC (Note 5) 48 TXD1_1– DNC (Note 5)
O9
TXEN1+ DNC (Note 5) 49 TXEN1– DNC (Note 5)
I10
RXD1_0+ RXD1+ 50 RXD1_0– RXD1–
I11
RXD1_1+ DNC (Note 5) 51 RXD1_1– DNC (Note 5)
I12
CRS_DV1+ DNC (Note 5) 52 CRS_DV1– DNC (Note 5)
I13
R_CLK+ (Note 3) R_CLK+ (Note 3) 53 R_CLK– (Note 3) R_CLK– (Note 3)
O14
GND GND 54 GND GND
O15
TXD2_0+ TXD2+ 55 TXD2_0– TXD2–
O16
TXD2_1+ DNC (Note 5) 56 TXD2_1– DNC (Note 5)
O17
TXEN2+ DNC (Note 5) 57 TXEN2– DNC (Note 5)
I18
RXD2_0+ RXD2+ 58 RXD2_0– RXD2–
I19
RXD2_1+ DNC (Note 5) 59 RXD2_1– DNC (Note 5)
I20
CRS_DV2+ DNC (Note 5) 60 CRS_DV2– DNC (Note 5)
I21
DNC (Note 5) R_SYNC+ (Note 3) 61 DNC (Note 5) R_SYNC– (Note 3)
O 22 GND GND 62 GND GND
O23
TXD3_0+ TXD3+ 63 TXD3_0– TXD3–
O24
TXD3_1+ DNC (Note 5) 64 TXD3_1– DNC (Note 5)
O25
TXEN3+ DNC (Note 5) 65 TXEN3– DNC (Note 5)
I26
RXD3_0+ RXD3+ 66 RXD3_0– RXD3–
I27
RXD3_1+ DNC (Note 5) 67 RXD3_1– DNC (Note 5)
I28
CRS_DV3+ DNC (Note 5) 68 CRS_DV3– DNC (Note 5)
I29
/RESET (Note 4) DNC (Note 5) 69 DNC (Note 5) DNC (Note 5)
O 30 GND GND 70 GND GND
O31TXD4_0+ TXD4+ 71 TXD4_0– TXD4–
O32
TXD4_1+ DNC (Note 5) 72 TXD4_1– DNC (Note 5)
O33
TXEN4+ DNC (Note 5) 73 TXEN4– DNC (Note 5)
I34
RXD4_0+ RXD4+ 74 RXD4_0– RXD4–
I35
RXD4_1+ DNC (Note 5) 75 RXD4_1– DNC (Note 5)
I36
CRS_DV4+ DNC (Note 5) 76 CRS_DV4– DNC (Note 5)
N/A 37
DNC (Note 5) DNC (Note 5) 77 DNC (Note 5) DNC (Note 5)
O 38 GND GND 78 GND GND
Note 6 39 MDIO (Note 6) MDIO (Note 6) 79 MDC (Note 6) MDC (Note 6)
O 40 3VCC 3VCC 80 3VCC 3VCC
1 SMII Output. Low for SMII, high for RMII. Disregard this signal for single-mode DUTs.
2 BRDCON Input. Active low, DUT connected flag. It should be tied to ground at the DUT.
3
R_CLK+/– and R_SYNC+/–. These two LVDS input pairs should be the output of 65LVDS31 drivers on the DUT. These signals must be
supplied to LAN-3150A via J2.
4 RESET This low active output can be used as PHY hardware reset signal.
5 DNC Do not connect.
6 MDIO This signal is bidirectional.
MDC This is an output signal.
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