CC1101
SWRS061H Page 94 of 98
0x38 (0xF8): PKTSTATUS – Current GDOx Status and Packet Status
The last CRC comparison matched. Cleared when entering/restarting RX
mode.
Carrier sense. Cleared when entering IDLE mode.
Preamble Quality reached. If leaving RX state when this bit is set it will
remain asserted until the chip re-enters RX state (MARCSTATE=0x0D). The
bit will also be cleared if PQI goes below the programmed PQT value.
Start of Frame Delimiter. In RX, this bit is asserted when sync word has
been received and de-asserted at the end of the packet. It will also de-
assert when a packet is discarded due to address or maximum length
filtering or the radio enters RXFIFO_OVERFLOW state. In TX this bit will
always read as 0.
Current GDO2 value. Note: the reading gives the non-inverted value
irrespective of what IOCFG2.GDO2_INV is programmed to.
It is not recommended to check for PLL lock by reading PKTSTATUS[2]
with GDO2_CFG=0x0A.
Current GDO0 value. Note: the reading gives the non-inverted value
irrespective of what IOCFG0.GDO0_INV is programmed to.
It is not recommended to check for PLL lock by reading PKTSTATUS[0]
with GDO0_CFG=0x0A.
0x39 (0xF9): VCO_VC_DAC – Current Setting from PLL Calibration Module
Status register for test only.
0x3A (0xFA): TXBYTES – Underflow and Number of Bytes
Number of bytes in TX FIFO
0x3B (0xFB): RXBYTES – Overflow and Number of Bytes
Number of bytes in RX FIFO
0x3C (0xFC): RCCTRL1_STATUS – Last RC Oscillator Calibration Result
Contains the value from the last run of the RC oscillator calibration routine.
For usage description refer to Application Note AN047 [4]
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