3.4.2 SOM Configuration DIP Switch
Table 3-7 shows the J721E SOM configuration switches (SW1-SW3) to set the various functions SOM.
Table 3-7. EVM Configuration Switch Function
Switch
Name
Default
Condition Signal Operation
SW1.1 ON LPDDR4_IO_SEL Selects the I/O voltage level for LPDDR4:
‘0’ (OFF) = Selects 0.6 V I/O for LPDDR4X
‘1’ (ON) = Selects 1.1 V I/O for LPDDR4
SW1.2 OFF SEL_SOC_I2Cn MUX to select I2C Interface for PMICs:
‘0’ (OFF) = PMIC I2C to SoC WKUP interface
‘1’ (ON) = PMIC I2C to External Header (test mode only)
SW2.1 OFF SEL_GPIO8_ALT Selection for PMIC Watchdog Timer/GPIO8:
‘0’ (OFF) = PMIC watchdog timer control is set with SW2.2
‘1’ (ON) = PMIC I/O used for GPIO8 (test point)
SW2.2 ON LEOA_WDOG_DIS Enable/Disable selection for PMIC Watchdog Timer:
‘0’ (OFF) = PMIC watchdog timer is enabled
‘1’ (ON) = PMIC watchdog timer is disabled
(note requires SW2.1 to be set to OFF)
SW3.1 ON SOC_SAFETY_ERRz Option to combine SOC_SAFETY_ERRz with MCU_SAFETY_ERR and PMIC.
‘0’ (OFF) = SOC_SAFETY_ERRz (Main) is isolated from PMIC.
‘1’ (ON) = SOC_SAFETY_ERRz (Main) is connected to PMIC.
SW3.2 OFF SOC_PWR_EN Manual method of enabling PMIC
‘0’ (OFF) = PMIC enabled by EVM system
‘1’ (ON) = PMIC enabled manually (test mode only)
EVM User Setup/Configuration www.ti.com
20 Jacinto7 J721E/DRA829/TDA4VM Evaluation Module (EVM) SPRUIS4D – MAY 2020 – REVISED MARCH 2022
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