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Texas Instruments J721E User Manual

Texas Instruments J721E
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4.16 Display Serial Interface (DSI) FPC
The J721E EVM supports DSI interface over FPC connector 52559-3652 by using the resistor mux on the J721E
DSI0 port. By default, the resistor mux is set to route the DSI0 signals to FPD Serializer. The power (12 V
and 3.3 V), I2C1 interface and GPIO controls (RESET and INTn) are supported in the DSI FPC connector to
interface with external display panel.
4.17 Audio Interface
Common Processor Board supports TI ‘s Audio Codec IC Mfr. Part# PCM3168APAP, to interface with J721E
SoC McASP Port 10. A 1:3 De-Mux (Mfr. Part# SN74CBT16214CDGGR) Port B1 is used to interface McASP
port 10 with codec. Port Selection is controlled by a I2C GPIO Expander and EVM Configuration switch. Table
4-21 shows the MUX table.
Table 4-21. MCASP/TRACE - 1:3 MUX: Truth Table
MUX_SEL2 MUX_SEL1 MUX_SEL0 Function
High High Low A port = B1 port
(default)High High High A port = B2 port
High Low High A port = B3 port
Port B1: McASP10
Port B2: TRACE
Port B3: GPMC
The Reference clock (SCKI) to the codec device is sourced from processor’s AUDIO_EXT_REFCLK2 using 1
to 2 Fan out clock buffer SN74LVC2G125DCUR, the secondary output clock from the fan out buffer is routed to
EVM expansion connector to interface to Infotainment Audio Codec devices.
The MODE pin is held LOW to select I2C as control interface. Codec is configured over I2C3 interface. Default
I2C address is set to 0x44. The device reset is controlled by the I2C GPIO expander using a I2C3 master port.
Line IN Port:
Single ended Stereo 1x Line Input signal from the Audio Jack J38 is converted to differential using “single ended
to differential converter with Anti-aliasing low pass fiter” and interfaced with CODEC.
MIC Input Port:
Single ended Stereo 2x MIC Input signals from the stacked Audio Jack J39 is converted to differential using
“single ended to differential converter with Anti-aliasing low pass fiter” and interfaced with CODEC. Pre-Amplifier
circuit is provider inline to LPF circuit to amplify the external microphone inputs.
Microphone Input ports can be configured for Active and Passive microphones and also can be configured for
Line Input. The configuration is set by the resistor option, as shown in Table 4-22.
Table 4-22. Config Table
(1)
Install Remove
PASSIVE-MIC
(default)
BIAS + PREAMP R2, R3, R5, R6 R1, R4
ACTIVE-MIC BIAS ONLY R1, R2, R4, R5 R3, R6
LINE-INPUT NO BIAS/PREAMP R1, R4 R2, R3, R5, R6
(1) The Reference Rx provided in this table denotes the text provided in the schematics.
Line Out Port:
2x digital Outputs from the CODEC is converted to single ended and terminated to stereo Audio jack J40 bottom
port using “differential to single ended” converter Line out circuit.
J721E EVM Hardware Architecture www.ti.com
66 Jacinto7 J721E/DRA829/TDA4VM Evaluation Module (EVM) SPRUIS4D – MAY 2020 – REVISED MARCH 2022
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Texas Instruments J721E Specifications

General IconGeneral
BrandTexas Instruments
ModelJ721E
CategoryMotherboard
LanguageEnglish

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